Imec is a semiconductor and nanotechnology research center in Belgium. They briefed on some recent announcements and their progress. Imec works in health and many other fields, but in collaboration with ASML in the Netherlands, Imec is a leading developer of semiconductor technology, especially advanced lithography. They also work on many memory technologies. Let’s take a look at recent developments.
Imec has discussed several roadmaps. The figure below shows their vision for wireless communications development by the end of the decade as we move to higher frequency communications. These higher frequencies require compound semiconductor (eg InP) devices coupled with CMOS logic in a planar package with an RF interposer.
Sri Samavedam talked about imec’s advances in logic technology. The transistor count on the chip looks set to continue Moore’s Law growth with 114B transistors on the March 2022 Apple M1 Ultra. Moore’s Law continues, but single-threaded performance growth is slowing a lot and the cost of designing chips continues to rise. This resulted in the use of various domain-specific processors. Important characteristics of future chips are dimensional expansion, new materials and device architectures, and co-optimization of system technology.
Below is a version of imec’s lithography roadmap. Currently, 2-7nm lithography semiconductors are using ASML’s first generation extreme ultraviolet (EUV) lithography equipment. Imec and ASML are collaborating on a new high numerical aperture hNA EUV machine in a laboratory in the Netherlands with the goal of producing hNA EUV by 2027 (much faster than the original ASML EUV machine).
Sri also talked about BEOL scaling, resistance and capacitance optimization, wafer backside powering, and various 2 and 2.5D chiplet architectures that imec calls System Technology Co-Optimization (STCO). He also discussed 3D chip system integration systems, including CMOS imagers, HBM-DRAM stacks, and high-performance computing. The Apple M1 Ultra uses an embedded Si-bridge package. The image below shows the imec roadmap for 3D wafer connectivity integration. They also said that one of the biggest requirements for 3D device design is an EDA tool that enables these complex 3D designs.
Arnaud Furnemont spoke at imec about the development of storage and memory technology. Memory faces demands for faster performance, lower cost and lower power consumption. The slides below are advancements in MRAM technology that are finding growth opportunities, especially in embedded devices. Arnaud also mentioned the advances in 3D memory moving from NAND to possible 3D DRAM and early research into 3D SRAM.
He also talked about some concepts of DNA memory and liquid memory for long-term storage.
There has also been a lot of discussion about making semiconductor manufacturing more sustainable. Lars Ake Ragnarsson notes that research shows that nearly 75% of the carbon footprint of mobile devices is due to manufacturing. Imec has been working on sustainable virtual fabs, as well as working with equipment and material suppliers as well as foundries and IDM players to improve processes and equipment and material use.
Imec is a leading semiconductor and nanotechnology development organization. The Imec roadmap shows several angstrom features and lithography advances that enable 3D integration. New memory technologies can be combined with current memory to store and handle the tsunami influx of data.